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Filter Verification Framework

This is a simple framework for performing bounded proving and bug finding int discrete-time digital filters. It employs both bit-precise and sound approximations to perform rapid overflow verification.

It is available for download here.


Shorties Microcontroller Board

The shorties board is a microcontroller development kit for children. It was designed in my spare time. Parts were funded by Agere Systems with help from Advanced Circuits. It was used for the 2006 Bring Your Son or Daughter to Work Day. The kids saw one of the boards being assembled and the older kids helped solder a component onto one of the boards. They then each received their own board and using some GUI software, drew pictures that were then displayed in the air when the board was swung on a string.

The board is based around a very low cost microcontroller: a PIC16LF872. The entire board, in prototype quantities cost less than $10. This includes the seven dual color LEDs along the edge and a parallel port programming cable.

The board is programmed via a bootloader based on the Microchip reference design. It accepts downloads from a PC serial port via a cable that connects to the Ethernet jack. Because the commercial Microchip debuggers and programmers use a six pin version of an Ethernet cable for programming, the design is also fully compatible with programmers like the ICD2.

The GUI software implements a simple drawing program, allowing the users to easily draw a picture to be loaded for use in persistence of vision mode. The GUI also allows arbitrary code to be downloaded and retrieved from the board. This makes it a general development kit. Complete with four buttons, it could be used to make games like Simon.


Eidolon Video Game Console

Copied from my original website.

Eidolon playing Pong

My senior design project was creating a custom video game console called "The Eidolon." The name is synonymous with the word Phantom. It is a play on the Phantom game console that never came into existence. My partner and I are proud of the fact that our Eidolon came into existence. It works quite well.

The system is designed to play basic video games from the 8-bit era of console gaming. This systems focus was not on the possibility of doing this, or even how cheaply it could be done, but more so, how easily it could be done. Many people have written games that run entirely on a microcontroller. There is a commercial product out there that even focuses on fitting an entire game into a microcontroller. Our project used two microcontrollers and an FPGA. So the question is, what is special about our project? Our console is extremely easy to write programs for. It has an extremely simple graphics API and a reasonably simple audio API that make generating games an afternoon activity. A game similar to that of Pong has already been developed (it took less than four hours to make and most of that time was spent in graphics conversion). A game similar to galaga is currently being developed.

CPU board

What makes this system so easy to program?

The system is architected so that it is easy to program. Framebuffer-based graphics allow simple, non-real-time graphics to be generated by the host processor. This means that the host does not have to meet real-time demands of television. Those demands are automatically handled in hardware. When a frame has completed generation using simple graphics copy commands, the currently displaying frame can be switched so that the frame that was generated will begin displaying. This will happen on the next vertical blank interval. This means that the graphics are free of tearing and are very clean. The audio is similar to the graphics in that it is completely non-real-time. The user of the audio simply defines a sound (it uses standard FM synthesis) and tells the audio system when to start playing. The audio system will meet the real-time demands and automatically stop playing when the sound has finished. The end result is that the system is easier to develop than a standard PC is. The hardware takes care of all of the traditional timing problems with creating video games.

Graphics output board

How was the system made?

The system is comprised of three main subsystems: Video, Audio and CPU. Video is divided into generation and display subsystems and audio is divided into generation and output subsystems. The video system is implemented on an Xilinx Spartan IIE FPGA. In addition to this FPGA there are three SRAM memories that are used for data/tile storage and for framebuffers 0 and 1. Connected to the FPGA is a custom PCB that converts properly timed RGB signals into NTSC television signals. It could be adapted for PAL by changing the timing circuit in the FPGA and changing the color carrier oscillator on the custom PCB. The custom signal converter PCB uses an Analog Devices DAC and television encoder. The generation part of the video subsystem is implemented entirely in the FPGA. It is basically a complex state machine that copies data from one SRAM to another or from the CPU to SRAM. It is not currently pipelined. It turns out pipelining this is extremely difficult due to the asynchronous (multi-cycle) SRAMs. Additionally, pipelining is not important due to the slow bus speed between the CPU and the video system. The graphics runs extremely fast compared to the CPU.

The audio system is done entirely in software on a microcontroller, except for external and external DAC, filter and amplifier. The audio system uses two oscillator phase modulated synthesis to produce sounds. It has effectively 12 sine wave oscillators implemented in software (6 simultaneous tones). It has programmable tone length, pitch and volume, plus a variety of envelope shaping functions that perform long-term shaping. It is implemented on an 8-bit Microchip 18F258 microcontroller. The software is written entirely in assembly language. No interrupts are used due to the cost of setting up the interrupts. The code is entirely timed through cycle counting.

Audio board

The CPU system is a simple Microchip 18F8410 (external memory capable) microcontroller. It has FIFOs connected to outputs between the video system and the CPU system and between the audio system and the CPU system. These are present so that the CPU can run asynchronously to the audio and video. This is necessary due to the slow speed of the external memory used for the changeable games. The CPU's only timing sensitive operation is polling the controller interface. The system uses NES controllers which do require specific timing, but the polling operation is fast and is now implemented in a library function for the system.

Custom PCBs were made for the CPU, the audio and the video DAC and encoder. PCBs were fabbed through Sparkfun's service as well as 4PCB's student offer.


Perkin Elmer LS-5

Copied from my original website

LS5 Screenshot

Perkin Elmer LS-5 is a phosphorescence spectrofluorometer. Is used by the chemistry department at the University of the Pacific to measure excitation and emission energies of various substances. I don't know the really practical applications of this device, but what is important is that the device is from 1981 and it came with a computer back then. Unfortunately that computer isn't very compatible with today's computers. It was an old UNIX system that used proprietary floppy disks for storage. The chemistry department had stopped using the LS-5 because they wanted to be able to analyze their data using modern tools and Perkin Elmer refused to sell them modern software for interfacing with the LS-5. The department asked me to write an interface to this device. Since there was no documentation of the communication protocol that was used, an HP serial protocol analyzer was used to look at the data transmissions. I then reverse engineered the protocol (it is RS232 based) and wrote an application to interface with the LS-5.

The LS-5 interface program is written in Python using wxPython and pySerial. Python, wxPython and pySerial must be installed before running the the LS-5 interface program. The program is provided without warranty, but it is free for anyone to use.

There have been several problems reported with this software. I have no way of fixing these problems because I have no access to the LS5 any longer. It is likely these problems are due to a problem with the encoding system. The LS5 uses a strange ASCII-like encoding. The lower 7 bits match ASCII, but the 8th bit is important and seemingly random.


Memory Hierarchy Sim

This is a laboratory designed for the Computers as Components class when taught by Dr. Li Shang. This simulator is not designed for high performance, but rather ease of comprehension. As this is the first exposure most students will have had to caching and virtual memory, the system is intentionally simplified.

The primary difficulties students have had with this lab are (a) understanding C++, (b) understanding bit manipulation in C and (c) understanding how cache sizing works. The big difficulty is understanding the math behind determining the number of bits in a cache.



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