I am a Ph.D. Candidate working in Professor Dan Connors' computer architecture research group.

Current Research My research deals simulation and characterization of multithreaded systems. I have also worked on architectural support for OS scheduling. This involves using both currently available performance monitoring hardware and exploring new capabilities in simulation.

Background I earned my BS in Engineering from Harvey Mudd College in Claremont, CA in May of 2000. I then went to work for Agilent Technologies Lightwave Division in Santa Rosa, CA where I worked on fiber optic and very high-speed electircal communications test equipment. I started as a graduate student at CU in fall 2002 and earned my MS in Electircal Engineering in December 2003. I interned the last two summer with the applications research lab at Intel working on simulation of multithreaded benchmarks on future CMP processors. I interned in the summer of 2004 at Hewlett-Packard working on performance analysis of the Itanium processor. I previously have held internships with the Environmental Protection Agency, General Motors, Spectra Logic, and The National Institutes of Standards and Technology.